A significant trend throughout IC development has been to try to increase the “yield rate” of semiconductor fabrication systems. The yield rate refers to the percentage of usable IC's produced by a fabrication system compared to the total number attempted. Similarly, the yield rate may refer to the percentage of usable IC's obtained on average from a semiconductor wafer that is processed through the fabrication system. A semiconductor wafer is essentially a thin disc of highly purified semiconductor material on which many IC's are fabricated together and then separated for individual packaging.
Significant factors that can negatively impact the yield rate are the number and size of defects in the wafer. Defects may include cracks, crazes (i.e. microscopic cracks), chips, flakes, scratches, marks, missing/broken edges and particle and residue contamination, among others.
Defects are particularly detrimental to the yield rate when they occur on the top surface of the wafer, since the top surface is the region where the IC's are formed on the wafer. Of historically lesser concern have been any other areas of the wafer, such as the bottom surface and the edge, or bevel, of the wafer. Since these areas are further from the formation of the IC's, any defects therein have been considered to have less of an impact on the yield rate for the IC's. Thus, many wafer-inspection and defect-detection techniques have been developed to inspect for defects in the top surface of wafers; whereas, comparatively few techniques have been developed to inspect for defects elsewhere on the wafers.
Detailed computerized image-analysis techniques have been used for wafer top surface defect detection, but not for wafer edge defect detection, since it has been commonly considered unnecessary to do so. Instead, wafer edge inspection has primarily been performed by manual visual inspection by a worker in the fabrication plant as illustrated by a flow chart shown in FIG. 1 for an exemplary manual visual inspection procedure 100. After a wafer is brought to a review station (step 102) for inspection, the worker determines (step 104) whether there is a known defect, such as a defect in the top surface of the wafer, near an area of interest on the edge of the wafer. The area of interest, in this case, is a point at or near the edge of the wafer where the worker desires to inspect for an edge defect. A positive answer at step 104 is helpful because currently available review tools enable the worker to instruct the review tool to automatically drive a view finder for an image capturing device to the known defect (step 106). This step (106) serves as a simple “gross” adjustment for the view finder. The worker then “fine tunes” the location of the view finder to the edge area of interest (step 108). If there is no known defect near the area of interest (as determined at step 104), then the worker must manually drive the view finder (step 110) to the edge area of interest without the benefit of the automatic gross adjustment of step 106. In either case, some manual adjustment of the view finder must be performed, which is time consuming and error prone. The image capturing device, such as a high-resolution camera, may then be used to generate an image (step 112) of the wafer edge on a monitor, which the worker manually views (step 114) for defects. In a lab notebook, the worker then records (step 116) the type of defect observed along with “context” information, such as lot ID, wafer ID, defect location, the step in the over-all fabrication process through which the wafer has just been processed, etc. This inspection procedure 100 is in stark contrast to the various complex computerized image-analysis techniques, among other inspection techniques, that have been developed to inspect the top surface of the wafers.
The generated images of the wafer edge are typically saved to a laser disk after manual viewing. The written notes regarding how the images can be extracted from that disk are kept only in the lab notebooks. Thus, there is typically no computer-searchable image or defect data.
Current non-visual wafer edge inspection techniques may record data “plots” (not images), which the worker may review for indications of defects or a computer may analyze for possible defects. Though the data may be stored for a time, the purpose of the data is generally for immediate pass/fail analysis of the wafer, so the wafer may be passed on for further processing, discarded as unusable or rerouted for rework or repair.
It is with respect to these and other considerations that the present invention has evolved.